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pad2bit.cpp
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1 /*
2  * pad2bit.cpp - device implementations for pad2bit module
3  *
4  * This is free software; you can redistribute it and/or modify
5  * it under the terms of the GNU General Public License as published by
6  * the Free Software Foundation; either version 2, or (at your option)
7  * any later version.
8  *
9  */
10 #include <stdlib.h>
11 
12 #include "pad2bit.h"
13 #include "node.h"
14 #include "main.h"
15 
17 {
18  Type = isComponent; // Analogue and digital component.
19  Description = QObject::tr ("2bit pattern generator verilog device");
20 
21  Props.append (new Property ("Number", "0", false,
22  QObject::tr ("pad output value")));
23 
24  createSymbol ();
25  tx = x1 + 4;
26  ty = y2 + 4;
27  Model = "pad2bit";
28  Name = "Y";
29 }
30 
32 {
33  pad2bit * p = new pad2bit();
34  p->Props.getFirst()->Value = Props.getFirst()->Value;
35  p->recreate(0);
36  return p;
37 }
38 
39 Element * pad2bit::info(QString& Name, char * &BitmapFile, bool getNewOne)
40 {
41  Name = QObject::tr("2Bit Pattern");
42  BitmapFile = (char *) "pad2bit";
43 
44  if(getNewOne) return new pad2bit();
45  return 0;
46 }
47 
49 {
50  Lines.append(new Line(-60, -50, 30,-50,QPen(QPen::darkGreen,2)));
51  Lines.append(new Line( 30, -50, 30, 10,QPen(QPen::darkGreen,2)));
52  Lines.append(new Line( 30, 10,-60, 10,QPen(QPen::darkGreen,2)));
53  Lines.append(new Line(-60, 10,-60,-50,QPen(QPen::darkGreen,2)));
54 
55  Lines.append(new Line( 40,-30, 30,-30,QPen(QPen::darkGreen,2))); // A
56  Lines.append(new Line( 40,-10, 30,-10,QPen(QPen::darkGreen,2))); // B
57 
58  Texts.append(new Text(-58,-33, " 0 1 2 3", QPen::darkGreen, 12.0));
59 
60  Ports.append(new Port(40,-10)); // B
61  Ports.append(new Port(40,-30)); // A
62 
63  x1 = -64; y1 = -54;
64  x2 = 40; y2 = 14;
65 }
66 
67 QString pad2bit::vhdlCode( int )
68 {
69  QString v = Props.at(0)->Value; ;
70  QString s1, s2, s3, s ="";
71 
72  QString A = Ports.at(0)->Connection->Name;
73  QString B = Ports.at(1)->Connection->Name;
74 
75  s1 = "\n "+Name+":process\n"+
76  " variable n_" + Name + " : integer := " + v + ";\n" +
77  " begin\n";
78  s2 = " case n_" + Name + " is\n" +
79  " when 0 => "+A+" <= '0'; "+B+" <= '0';\n" +
80  " when 1 => "+A+" <= '0'; "+B+" <= '1';\n" +
81  " when 2 => "+A+" <= '1'; "+B+" <= '0';\n" +
82  " when 3 => "+A+" <= '1'; "+B+" <= '1';\n" +
83  " when others => null;\n" +
84  " end case;\n";
85  s3 = " end process;\n";
86  s = s1+s2+s3;
87  return s;
88 }
89 
90 QString pad2bit::verilogCode( int )
91 {
92  QString v = Props.at(0)->Value;
93 
94  QString l = "";
95  QString l1, l2, l3;
96 
97  QString A = Ports.at(0)->Connection->Name;
98  QString B = Ports.at(1)->Connection->Name;
99 
100  QString AR = "A_reg" + Name + A;
101  QString BR = "Y_reg" + Name + B;
102 
103 
104  l1 = "\n // "+Name+" 2bit pattern generator\n"+
105  " assign "+A+" = "+AR+";\n"+
106  " reg "+AR+" = 0;\n"+
107  " assign "+B+" = "+BR+";\n"+
108  " reg "+BR+" = 0;\n"+
109  " initial\n";
110  l2 = " begin\n"
111  " case ("+v+")\n"+
112  " 0 : begin "+AR+" = 0; "+BR+" = 0; end\n"+
113  " 1 : begin "+AR+" = 0; "+BR+" = 1; end\n"+
114  " 2 : begin "+AR+" = 1; "+BR+" = 0; end\n"+
115  " 3 : begin "+AR+" = 1; "+BR+" = 1; end\n"+
116  " endcase\n";
117  l3 = " end\n";
118  l = l1+l2+l3;
119  return l;
120 }