Links
- Phase Locked Loop Simulation using T-Spice
- SPICE PLL file There is one error found in the code when I copy it from the pdf In the statement of NMOS /PMOS Model,VTO(letter "O") is spelled into VT0(zero) .that's wrong
​
- Inset photo example can be found on the Nap0 page. It uses his LTSPICE "control" library. Click on image. My notes are on this page
0 Comments