Cadence
Cadence Vector Files
This is mostly a place holder for later when I need to know about Cadence vector files. Research Links Vector File Simulation digital vector file format guide
Architecture
OpenDesk – Open Source Furniture – Downloadable Designs
This furniture is set up for CNC machines that use 4 x 8 ft plywood.
Cadence
Cadence: VCO Design Using SpectreRF
I was looking for a way I could plot the output frequency of a ring oscillator versus an input tuning voltage. I did not find anything easy and fast in the literature but I think PSS is the key for the more formal methods. PSS = Periodic Steady State. Read more…
Cadence
1 nanoamp Current Source with No Resistors Using Self Cascode MOSFET
Note the 500M Ohm resistor is only to test the current reference.  It would be replaced by your application circuit. Research Links A 2-nW 1.1-V Self-Biased Current Reference in CMOS Technology CMOS Current Reference for UltraLow Energy Consumption  Archive:  Current-Source.7z   Program = LTSPICE Extract into directory.  Includes the required Read more…
Cadence
Monte Carlo Analysis with Cadence and the XFAB Design Kit
Getting Monte Carlo analysis to work on Cadence can be a bit of a puzzle given how Cadence is a ball of various software tools stuck together with spit. You have have seen the following intermodal nastygram: Research Links ReadMeMonteCarlo.txt SPICEModelsAndSimulations_13.pdf
Electronics
Book: CMOS: Jacob Baker
Jacob Baker maintains CMOSedu.com. There is a large amount of useful material there. Research Links CMOS Circuit Design, Layout, and Simulation, Third Edition – there are files on that page for use with LTSPICE , Cadence etc Setting up ELECTRIC to work with LTSPICE VLSI and ASIC Technology Standard Cell Read more…
Design Tools
Adding Series 4000 CMOS library to LTSPICE
SPICE Research Links Instructions how to use the library files with LTSPICE CD4000.lib CD4000.zip
Electronics
PLL Phase Lock Loop Design and Modeling
Links Phase Locked Loop Simulation using T-Spice SPICE PLL file There is one error found in the code when I copy it from the pdf In the statement of NMOS /PMOS Model,VTO(letter "O") is spelled into VT0(zero) .that's wrong ​ ​ Inset photo example can be found on the Nap0 Read more…
Electronics
Operational Amplifier Design
Links Design of an Folded Cascode Operational Amplifier in High Voltage CMOS Technology More SPICE Examples Dr. Lynn Fuller Archive: OTA-Folded-Cascode.7z